1. Field of the Invention
The invention relates to an apparatus for reproducing a digital signal recorded on a recording medium.
2. Description of Background Information
With the trend of increase in capacity of recording information, high density recording of information is being pursued. When reproducing recorded information from a recording medium on which the information is recorded at a high density as mentioned above, the reproduction signal obtained will be a signal largely affected by waveform interferences. Thus, an error ratio will be significantly increased when the reproduction signal is decoded. In view of the problem mentioned above, there has been proposed a method in which a Viterbi decoding is performed to the reproduction signal with waveform interferences as mentioned above, and the error ratio of the signal being decoded is reduced.
FIG. 1 shows a digital signal reproducing apparatus using such a Viterbi decoder.
In the diagram, a read signal which is read out by a pickup (not shown) from a recording medium on which recording information has been recorded at a high density is supplied to equalizers 1 and 2, respectively. The equalizer 1 amplifies the supplied read signal in accordance with the equalizing characteristics suitable for a clock signal and eliminates noises and supplies the resultant signal to a pulse forming circuit 3. The pulse forming circuit 3 compares the supplied signal and a reference voltage and forms a pulse and supplies the resultant pulse signal to a clock generating circuit 4. The clock generating circuit 4 generates a clock signal whose phase is synchronized with the supplied pulse signal and supplies the clock signal to an A/D converter 5 as a sampling clock signal. The equalizer 2 amplifies the supplied read signal by the equalizing characteristics suitable for the data discrimination and eliminates noises and supplies the resultant signal to the A/D converter 5. The A/D converter 5 is operative to sample the signal supplied from the equalizer 2 and convert the sampled signal into the digital signal at timings of the supplied sampling clock signal, and to supply the resultant sample values to a Viterbi decoder 6. The Viterbi decoder 6 observes the supplied sample values as a series and decodes and generates a decoding data series having the highest existence probability for the input sample value series.
According to the conventional digital signal reproducing apparatus as mentioned above, the equalizers for waveform equalization are necessary only for the data signal system and the clock signal forming system, respectively.
The delay time of the clock signal forming system which is constituted by the equalizer 1, pulse forming circuit 3, and clock generating circuit 4 is not always equal to the delay time of the equalizer 2 as a data signal system. In order to accurately obtain the sampling clock signal synchronized with the phase of the read signal, accordingly, it is necessary to use a delay adjusting circuit to make the delay times of the data signal system and the clock signal forming system equal to each other. However, if the delay time of each circuit changes due to a factor such as temperature change or the like, since the delay adjusting circuit as mentioned above cannot cope with the delay adjustment, there will be a problem that the sampling clock signal synchronized with the phase of the read signal cannot be obtained.